RSRC LVINLBVW-C -tP <@ A].]l}CQ,s&ُ B~0ُ B~Ws0.=FDEMAE]zMLVINpid_control_labview.vi(VIXN SimDog.xnodePTH0N Simulation ScriptingCompanion Diagram SimConfigNode SimDog.xnode̷VICC SimParams.ctlPTH0O Simulation ScriptingCompanion Diagram SimConfigNode SimParams.ctl/@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason @!status @code@0source@P#$%Error@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@! Nan/Inf Check~ SimParams.ctlh@P+  !"&'()*+,-Timing.SIMUSIMMPVICC_simSolvers.ctlPTH0Q Simulation ScriptingCompanion Diagram SimConfigNode_simSolvers.ctlo_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval Solver MethodSIMUSIMMPVICCSIMSCR Execution Mode.ctlPTH0G SimulationImplementationSharedSIMSCR Execution Mode.ctl:SIMSCR Execution Mode.ctl@Execution ModeSIMUSIMM VIVI_simCreateTimingSource.viPTH0[ Simulation ScriptingCompanion Diagram SimConfigNode_simCreateTimingSource.vi2@ Initial Time (s)@ Final Time (s)@ Step Size (s)@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason @!status @code@0source@P$%&Error@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@!Full Solver Reset@Execution Mode@! Nan/Inf Checkj@P+  !"#'()*+,-. timing (out)h@P+  !"#'()*+,-. timing (in)< /0x 1SIMUSIMMPVIVISIM Unbundle Sim Info.viPTH0F SimulationImplementationSharedSIM Unbundle Sim Info.vi2@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason @!status @code@0source@P#$%Error@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@! Nan/Inf Check SimParams.ctlv@P+  !"&'()*+,-SimulationParameters SimParams.ctlz@P+  !"&'()*+,-SimulationParameters OutL.//&/////0/  1SIMUSIMMPVIXNXDataNode.xnodePTH09platform TimedLoop XDataNodeXDataNode.xnodeVICCXDNodeRunTimeDep.lvlibtiming_clust.ctlPTH0:Platform TimedLoop XDataNodetiming_clust.ctl @Expected End [f-1]@Actual End [f-1]@!Finished Late? [f-1]@Expected End [i-1]@Actual End [i-1]@!Finished Late? [i-1]@Expected Start [i]@Actual Start [i]@Expected Start [f]@Actual Start [f]@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @TimeoutXDNodeRunTimeDep.lvlibnitl_modes.ctl@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModeXDNodeRunTimeDep.lvlib wakeup.ctl~@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup Reason @!status @code@0source@PError@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@Frame Duration@Iteration Duration@ Assigned CPUzcsXDNodeRunTimeDep.lvlibtiming_clust.ctl`@P TimingVICCXDNodeRunTimeDep.lvlibnitl_modes.ctlPTH08Platform TimedLoop XDataNodenitl_modes.ctlXDNodeRunTimeDep.lvlibnitl_modes.ctl@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModeVICCXDNodeRunTimeDep.lvlib wakeup.ctlPTH04Platform TimedLoop XDataNode wakeup.ctlXDNodeRunTimeDep.lvlib wakeup.ctl~@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reasonVIVIXDNodeRunTimeDep.lvlibloadlvalarms.viPTH09Platform TimedLoop XDataNodeloadlvalarms.viVIVISIM Init From Cluster.viPTH0F SimulationImplementationSharedSIM Init From Cluster.viSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@' Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P)*+,-./ Node Header@@0 Node Headers @ Signal@@2 Node Data@@2 Node Outputs@@2 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@6Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P3457 Node Record@@8 Node Data @ Numeric@@:inputs@@:outputs@@:reset@@: lower limits@@: upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@@ limit types@@6 reset types @@:initial conditions@@: reset I.C. @!Boolean@@Elimited?@0String@@G State NamesRSIM solver state data.ctl0@P ;<=>?ABCDFHCont State data@ tick period (sec)@ time (ticks)@@Efire?@ period (sec)@@M period (sec)@@M skew (sec)@ period (sec)@@P period (tick)@@P skew (tick)@PNOQRregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PJKLSTUVW DiscreteInfo@@: Disc StatesBSIM Discrete state data.ctl@PYHDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P[Registry Error @Numeric@@] ZC IndicesTlWSIM Simulation Registry.ctl0@P &(19IXZ\^Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlj@P&  !"#$%_`abSimulation data out@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason@PError@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@! Nan/Inf Check SimParams.ctlz@P+defghijklmnopqrstuvwxyz{|}~"#SimulationParameters out SimParams.ctlv@P+defghijklmnopqrstuvwxyz{|}~"#SimulationParameters,c` SIMUSIMMPVICCSIM subVI tag data.ctlPTH0I Simulation ScriptingEditor UtilitiesSIM subVI tag data.ctl @ period @ skewSIM subVI execution type.ctli@ Function callDiscrete ContinuousInitialization onlyFinal step onlySimulation execution typeCSIM subVI tag data.ctl#@PSIM subVI tag dataSIMUSIMMPVICCSIM subVI execution type.ctlPTH0O Simulation ScriptingEditor UtilitiesSIM subVI execution type.ctlSIM subVI execution type.ctli@ Function callDiscrete ContinuousInitialization onlyFinal step onlySimulation execution typeSIMUSIMMPVIVISIM Is Init or Final Stage.viPTH0K simulationimplementationsharedSIM Is Init or Final Stage.vig@!Init or Final Stage?SIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@( Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P*+,-./0 Node Header@@1 Node Headers @ Signal@@3 Node Data@@3 Node Outputs@@3 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@7Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P4568 Node Record@@9 Node Data @ Numeric@@;inputs@@;outputs@@;reset@@; lower limits@@; upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@A limit types@@7 reset types @@;initial conditions@@; reset I.C. @!Boolean@@Flimited?@0String@@H State NamesRSIM solver state data.ctl0@P <=>?@BCDEGICont State data@ tick period (sec)@ time (ticks)@@Ffire?@ period (sec)@@N period (sec)@@N skew (sec)@ period (sec)@@Q period (tick)@@Q skew (tick)@POPRSregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PKLMTUVWX DiscreteInfo@@; Disc StatesBSIM Discrete state data.ctl@PZIDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P\Registry Error @Numeric@@^ ZC IndicesTlWSIM Simulation Registry.ctl0@P ')2:JY[]_Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlj@P&  !"#$%&`abcSimulation data outnSIM simulation data.ctlf@P&  !"#$%&`abcSimulation data< dex fSIMUSIMMPVIVIsim fire discrete subvi.viPTH0H simulationimplementationsharedsim fire discrete subvi.vik @ period @ skewSIM subVI execution type.ctli@ Function callDiscrete ContinuousInitialization onlyFinal step onlySimulation execution typeCSIM subVI tag data.ctl#@PSIM subVI exec dataSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@+ Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P-./0123 Node Header@@4 Node Headers @ Signal@@6 Node Data@@6 Node Outputs@@6 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@:Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P789; Node Record@@< Node Data @ Numeric@@>inputs@@>outputs@@>reset@@> lower limits@@> upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@D limit types@@: reset types @@>initial conditions@@> reset I.C. @!Boolean@@Ilimited?@0String@@K State NamesRSIM solver state data.ctl0@P ?@ABCEFGHJLCont State data@ tick period (sec)@ time (ticks)@@Ifire?@ period (sec)@@Q period (sec)@@Q skew (sec)@ period (sec)@@T period (tick)@@T skew (tick)@PRSUVregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PNOPWXYZ[ DiscreteInfo@@> Disc StatesBSIM Discrete state data.ctl@P]LDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P_Registry Error @Numeric@@a ZC IndicesTlWSIM Simulation Registry.ctl0@P *,5=M\^`bSimulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlf@P&  !"#$%&'()cdefSimulation data @!Fire!nSIM simulation data.ctlj@P&  !"#$%&'()cdefSimulation data out4 ghi jSIMUSIMMPVIXNSIMX Halt.xnodePTH09 SimulationUtility SIMX HaltSIMX Halt.xnode̺VIVI sim halt.viPTH0: simulationutilityimplementation sim halt.vif @!Halt?SIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@' Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P)*+,-./ Node Header@@0 Node Headers @ Signal@@2 Node Data@@2 Node Outputs@@2 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@6Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P3457 Node Record@@8 Node Data @ Numeric@@:inputs@@:outputs@@:reset@@: lower limits@@: upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@@ limit types@@6 reset types @@:initial conditions@@: reset I.C. @!Boolean@@Elimited?@0String@@G State NamesRSIM solver state data.ctl0@P ;<=>?ABCDFHCont State data@ tick period (sec)@ time (ticks)@@Efire?@ period (sec)@@M period (sec)@@M skew (sec)@ period (sec)@@P period (tick)@@P skew (tick)@PNOQRregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PJKLSTUVW DiscreteInfo@@: Disc StatesBSIM Discrete state data.ctl@PYHDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P[Registry Error @Numeric@@] ZC IndicesTlWSIM Simulation Registry.ctl0@P &(19IXZ\^Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlf@P&  !"#$%_`abSimulation datanSIM simulation data.ctlj@P&  !"#$%_`abSimulation data outLcd eSIMUSIMMPVICCSIM SISO Transfer Function.ctlPTH0H SimulationShared _DatatypesSIM SISO Transfer Function.ctl @ Numeric@@ Numerator@@ DenominatorGSIM SISO Transfer Function.ctl@PTransfer FunctionSIMUSIMMPVIVI+SIM Transfer Function Distributor (SISO).viPTH0} SimulationContinuousLinearImplementationSIM Transfer Function.llb+SIM Transfer Function Distributor (SISO).vin @ Numeric@@ Numerator@@ DenominatorGSIM SISO Transfer Function.ctl@PTransfer Function"@0DNL_Simulation CallChainSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@, Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P./01234 Node Header@@5 Node Headers @ Signal@@7 Node Data@@7 Node Outputs@@7 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@;Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P89:< Node Record@@= Node Data@@inputs@@outputs@@reset@@ lower limits@@ upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@D limit types@@; reset types @@initial conditions@@ reset I.C. @!Boolean@@Ilimited?@0String@@K State NamesRSIM solver state data.ctl0@P ?@ABCEFGHJLCont State data@ tick period (sec)@ time (ticks)@@Ifire?@ period (sec)@@Q period (sec)@@Q skew (sec)@ period (sec)@@T period (tick)@@T skew (tick)@PRSUVregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PNOPWXYZ[ DiscreteInfo@@ Disc StatesBSIM Discrete state data.ctl@P]LDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P_Registry Error @Numeric@@a ZC IndicesTlWSIM Simulation Registry.ctl0@P +-6>M\^`bSimulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlf@P&  !"#$%&'()*cdefSimulation data@ Block Idx Out @ outputnSIM simulation data.ctlj@P&  !"#$%&'()*cdefSimulation data out @@kstates4 ghijl  mSIMUSIMMPVIVINI_PtbyPt.lvlibUniform White Noise PtByPt.viPTH0GptbyptSignal Generation.llbUniform White Noise PtByPt.vi@ uniform white noise@! initialize @seed@ amplitude  VIXNSIMX Summation.xnodePTH0L SimulationSignalArithmeticSIMX SummationSIMX Summation.xnode̺&VIVINI_AALPro.lvlibPolynomial Interpolation.viPTH0;Analysis 5stat.llbPolynomial Interpolation.vi @error@ interpolation error@ interpolation value @ x value @@X@@Y$P VIVItimeconstant_lowpass_filter.viPTH0$timeconstant_lowpass_filter.vi@ Filter_output @ Ts [s] @ Tf [s]@ Filter_input VIXNSIMX TimeWaveform.xnodePTH0O Simulation SignalDisplaySIMX TimeWaveformSIMX TimeWaveform.xnode̺VIVISIM Time Waveform (vector).viPTH0h Simulation SignalDisplayImplementationSIM Time Waveform.llbSIM Time Waveform (vector).vij @ Value@@ValueSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@) Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P+,-./01 Node Header@@2 Node Headers @ Signal@@4 Node Data@@4 Node Outputs@@4 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@8Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P5679 Node Record@@: Node Data @ Numeric@@<inputs@@<outputs@@<reset@@< lower limits@@< upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@B limit types@@8 reset types @@<initial conditions@@< reset I.C. @!Boolean@@Glimited?@0String@@I State NamesRSIM solver state data.ctl0@P =>?@ACDEFHJCont State data@ tick period (sec)@ time (ticks)@@Gfire?@ period (sec)@@O period (sec)@@O skew (sec)@ period (sec)@@R period (tick)@@R skew (tick)@PPQSTregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PLMNUVWXY DiscreteInfo@@< Disc StatesBSIM Discrete state data.ctl@P[JDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P]Registry Error @Numeric@@_ ZC IndicesTlWSIM Simulation Registry.ctl0@P (*3;KZ\^`Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlf@P&  !"#$%&'abcdSimulation dataT@@fWaveform ChartnSIM simulation data.ctlj@P&  !"#$%&'abcdSimulation data out4 egh iSIMUSIMMPVIPVPID Advanced.viPTH07addonscontrolpidpid.llbPID Advanced.viqiNILVPID VIVIPID Advanced (DBL).viPTH0=addonscontrolpidpid.llbPID Advanced (DBL).vi@ setpoint@ output high@ output low@P output range@! auto? (T)@ manual control @ output@ process variable@ setpoint high@ setpoint low@P setpoint range@ proportional gain (Kc)@ integral time (Ti, min)@ derivative time (Td, min)@P  PID gains @ dt (s)@!reinitialize? (F) @ beta@ linearity@ dt out (s)L     NILVPID VIVI)SIM Transfer Function collector (SISO).viPTH0{ SimulationContinuousLinearImplementationSIM Transfer Function.llb)SIM Transfer Function collector (SISO).viiSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@& Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P()*+,-. Node Header@@/ Node Headers @ Signal@@1 Node Data@@1 Node Outputs@@1 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@5Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P2346 Node Record@@7 Node Data @ Numeric@@9inputs@@9outputs@@9reset@@9 lower limits@@9 upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@? limit types@@5 reset types @@9initial conditions@@9 reset I.C. @!Boolean@@Dlimited?@0String@@F State NamesRSIM solver state data.ctl0@P :;<=>@ABCEGCont State data@ tick period (sec)@ time (ticks)@@Dfire?@ period (sec)@@L period (sec)@@L skew (sec)@ period (sec)@@O period (tick)@@O skew (tick)@PMNPQregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PIJKRSTUV DiscreteInfo@@9 Disc StatesBSIM Discrete state data.ctl@PXGDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@PZRegistry Error @Numeric@@\ ZC IndicesTlWSIM Simulation Registry.ctl0@P %'08HWY[]Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlf@P&  !"#$^_`aSimulation datanSIM simulation data.ctlj@P&  !"#$^_`aSimulation data out@ Block Idx In @ input"@0DNL_Simulation CallChainLbcccdecfcccccccg hSIMUSIMMPVIVISIM Time Waveform (scalar).viPTH0h Simulation SignalDisplayImplementationSIM Time Waveform.llbSIM Time Waveform (scalar).vih @ ValueSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@( Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P*+,-./0 Node Header@@1 Node Headers @ Signal@@3 Node Data@@3 Node Outputs@@3 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@7Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P4568 Node Record@@9 Node Data @ Numeric@@;inputs@@;outputs@@;reset@@; lower limits@@; upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@A limit types@@7 reset types @@;initial conditions@@; reset I.C. @!Boolean@@Flimited?@0String@@H State NamesRSIM solver state data.ctl0@P <=>?@BCDEGICont State data@ tick period (sec)@ time (ticks)@@Ffire?@ period (sec)@@N period (sec)@@N skew (sec)@ period (sec)@@Q period (tick)@@Q skew (tick)@POPRSregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PKLMTUVWX DiscreteInfo@@; Disc StatesBSIM Discrete state data.ctl@PZIDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P\Registry Error @Numeric@@^ ZC IndicesTlWSIM Simulation Registry.ctl0@P ')2:JY[]_Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlf@P&  !"#$%&`abcSimulation data@TWaveform ChartnSIM simulation data.ctlj@P&  !"#$%&`abcSimulation data out4 def gSIMUSIMMPVIXNSIMX Manager.xnodePTH0M SimulationImplementationShared SIMX ManagerSIMX Manager.xnode̷VIVISIM comprehensive manager.viPTH0J SimulationImplementationSharedSIM comprehensive manager.vif@!step complete?SIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@& Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P()*+,-. Node Header@@/ Node Headers @ Signal@@1 Node Data@@1 Node Outputs@@1 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@5Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P2346 Node Record@@7 Node Data @ Numeric@@9inputs@@9outputs@@9reset@@9 lower limits@@9 upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@? limit types@@5 reset types @@9initial conditions@@9 reset I.C. @!Boolean@@Dlimited?@0String@@F State NamesRSIM solver state data.ctl0@P :;<=>@ABCEGCont State data@ tick period (sec)@ time (ticks)@@Dfire?@ period (sec)@@L period (sec)@@L skew (sec)@ period (sec)@@O period (tick)@@O skew (tick)@PMNPQregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PIJKRSTUV DiscreteInfo@@9 Disc StatesBSIM Discrete state data.ctl@PXGDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@PZRegistry Error @Numeric@@\ ZC IndicesTlWSIM Simulation Registry.ctl0@P %'08HWY[]Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlj@P&  !"#$^_`aSimulation data outnSIM simulation data.ctlf@P&  !"#$^_`aSimulation databcd(  eSIMUSIMMPVIVISIM Linearizer manager.viPTH0{ SimulationContinuousLinearImplementationSharedSolversSIM Linearizer Manager.llbSIM Linearizer manager.vig @!Stop?SIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@' Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P)*+,-./ Node Header@@0 Node Headers @ Signal@@2 Node Data@@2 Node Outputs@@2 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@6Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P3457 Node Record@@8 Node Data @ Numeric@@:inputs@@:outputs@@:reset@@: lower limits@@: upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@@ limit types@@6 reset types @@:initial conditions@@: reset I.C. @!Boolean@@Elimited?@0String@@G State NamesRSIM solver state data.ctl0@P ;<=>?ABCDFHCont State data@ tick period (sec)@ time (ticks)@@Efire?@ period (sec)@@M period (sec)@@M skew (sec)@ period (sec)@@P period (tick)@@P skew (tick)@PNOQRregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PJKLSTUVW DiscreteInfo@@: Disc StatesBSIM Discrete state data.ctl@PYHDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P[Registry Error @Numeric@@] ZC IndicesTlWSIM Simulation Registry.ctl0@P &(19IXZ\^Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlj@P&  !"#$%_`abSimulation data outnSIM simulation data.ctlf@P&  !"#$%_`abSimulation datacde( fSIMUSIMMPVIVISIM Trim manager.viPTH0o SimulationContinuousLinearImplementationSharedSolversSIM Trim Manager.llbSIM Trim manager.vig @!Stop?SIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@' Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P)*+,-./ Node Header@@0 Node Headers @ Signal@@2 Node Data@@2 Node Outputs@@2 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@6Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P3457 Node Record@@8 Node Data @ Numeric@@:inputs@@:outputs@@:reset@@: lower limits@@: upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@@ limit types@@6 reset types @@:initial conditions@@: reset I.C. @!Boolean@@Elimited?@0String@@G State NamesRSIM solver state data.ctl0@P ;<=>?ABCDFHCont State data@ tick period (sec)@ time (ticks)@@Efire?@ period (sec)@@M period (sec)@@M skew (sec)@ period (sec)@@P period (tick)@@P skew (tick)@PNOQRregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PJKLSTUVW DiscreteInfo@@: Disc StatesBSIM Discrete state data.ctl@PYHDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P[Registry Error @Numeric@@] ZC IndicesTlWSIM Simulation Registry.ctl0@P &(19IXZ\^Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlj@P&  !"#$%_`abSimulation data outnSIM simulation data.ctlj@P&  !"#$%_`abSimulation data incde( fSIMUSIMMPVIVISIM TrimLin Global Error.viPTH0d SimulationModel Trim and LinearizeSIM Lin Trim Shared.llbSIM TrimLin Global Error.vi @!status @code@0source@P error outPSIMUSIMMPVIVISIM stop conditions.viPTH0D SimulationImplementationSharedSIM stop conditions.vih @!resultSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratioeSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@( Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx@ Output WidthI2RZSIM Registry Node Header.ctl#@P*+,-./0 Node Header@@1 Node Headers @ Signal@@3 Node Data@@3 Node Outputs@@3 Z.C. SignalsQSIM trigger type.ctl3@risingfallingeithernone trigger type @@7Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P4568 Node Record@@9 Node Data @ Numeric@@;inputs@@;outputs@@;reset@@; lower limits@@; upper limitsGSIM limit type.ctl+@upperlowerbothnone limit type@@A limit types@@7 reset types @@;initial conditions@@; reset I.C. @!Boolean@@Flimited?@0String@@H State NamesRSIM solver state data.ctl0@P <=>?@BCDEGICont State data@ tick period (sec)@ time (ticks)@@Ffire?@ period (sec)@@N period (sec)@@N skew (sec)@ period (sec)@@Q period (tick)@@Q skew (tick)@POPRSregistry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?FcASIM discrete data.ctl(@PKLMTUVWX DiscreteInfo@@; Disc StatesBSIM Discrete state data.ctl@PZIDisc State data@Error Block IDH2Q!SIM Simulation Registry Error.ctl@P\Registry Error @Numeric@@^ ZC IndicesTlWSIM Simulation Registry.ctl0@P ')2:JY[]_Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?nSIM simulation data.ctlj@P&  !"#$%&`abcSimulation data Out"@Default Collector Stop ModenSIM simulation data.ctlf@P&  !"#$%&`abcSimulation data,def`  gSIMUSIMMPVIVISIMSCR Append VI info.viPTH0L Simulation ScriptingCompanion DiagramSIMSCR Append VI info.vi @!status @code@0source@P error out@Perror in SIMUSIMMPVIVISIM MergeSimErrors.viPTH0C SimulationImplementationSharedSIM MergeSimErrors.vi @!status @code@0source@P error out@Perror 2@Perror 1,` SIMUSIMMPVIVISIM Bundle Sim Info.viPTH0D SimulationImplementationSharedSIM Bundle Sim Info.vi3@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason @!status @code@0source@P$%&Error@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@! Nan/Inf Check SimParams.ctlv@P+  !"#'()*+,-.Simulation Params out@P$%&error in SimParams.ctlv@P+  !"#'()*+,-.Simulation Params in< /01x  2SIMUSIMMPVIVI_simClearTimingSource.viPTH0Z Simulation ScriptingCompanion Diagram SimConfigNode_simClearTimingSource.vi1@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason @!status @code@0source@P$%&Error@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@! Nan/Inf Check~ SimParams.ctlh@P+  !"#'()*+,-.Timing4 /0SIMUSIMMPLuB c d1` P c@flg@oRt@eof@Pudf@!Reinitialize controller@!dfd@!txd@!old@!extP  c@TWaveform Chart u @Tdfd @Ttxd @Told @TextP 0 P @*P @ ! @6P !!!"# @$ @3 P''' @(P"""" P" @+ P#" @-P""" @/PP 1 @2&P%&)%*&,.03T @5P6P77 @P999+P999/ P! @<*P!!!!!!!!!= c7@! Sim/Real?P @  c#@@5Waveform Chart y@@5dfd@@5txd@@5old@@5extP CDEFG@5PIPJJ c$@@!Physical_min_max [kRPM]@@!dfd@@!txd@@!old@@!extP MNOPQP999! P!!! c4@@!Meas_min_max [V]P VNOPQ c$ @ Filter time-constant Tf [s]@ dfd@ txd@ old@ extP YZ[\]@ Time step Ts [s]P _Z[\]@ Setpoint y_SP [kRPM]P aZ[\] c0@! Auto/Man?P d  c@ u_man [V]P gZ[\] c@ Output high@ Output low*@PjkController output (u) range [V]@P!!dfd@P!!txd@P!!old@P!!extP lmnop@ Setpoint high@ Setpoint low(@PrsSetpoint (y_SP) range [kRPM]P tmnop@ Proportional gain Kc@ Integral time Ti [sec]@ Derivative time Td [sec]@Pvwx PID gains@P!!!dfd@P!!!txd@P!!!old@P!!!extP yz{|} @!stopP  P# @P!!!!! P# @ P @P @PolyIdx\SIMX SubVIIconStyle.ctl<@StaticDynamic ParameterizedTextOnly Icon Style@3Icon @0ID@0NamemSIMX ParamSrcPrivate.ctlK@ Config PageInternal TerminalOnlyTerminalConfigPageOnlySource @!Input?@0String@@Feedthrough Map @flags@ ConPane IdxASIMX ParamHeader.ctl#@P ParamHeader @SValue@STypeDesc9NI_XNodeSupport.lvlib XNodeInt.ctl#@Left7NI_XNodeSupport.lvlib XNodeInt.ctl!@Top9NI_XNodeSupport.lvlib XNodeInt.ctl#@Right;NI_XNodeSupport.lvlib XNodeInt.ctl%@BottomHNI_XNodeSupport.lvlibXNodeRect32.ctl0@PBoundsF BSIMX ParameterElement.ctl$@PParameter Element@@ Instances: BSIMX ParameterRec.ctl@P ParameterRec@@ Parameters @!VI Ok?@2VI Path@0 Attribute@@ AttributesMFSIMX ImplementationElement.ctl%@PCurrent Implementation@@Displayed Params@v@h3H XPoint32.ctl@PParam Minimums3H XPoint32.ctl@PParam Maximums1H XPoint32.ctl@P Param CurrentRSIMX ParameterizedIconState.ctl*@PParameterized Icon Info@@ Text Inputs@@ Text Outputs1H XPoint32.ctl@P Text Minimums1H XPoint32.ctl@P Text Maximums1H XPoint32.ctl@P Text Current@ Output WidthMMSIMX TextOnlyIconState.ctl)@PText Only Icon InfoB BSIMX SubVIState.ctl&@P SubVI Info @ColorKSIMX Orientation.ctl-@ForwardBackwardBlock OrientationQSIMX DiagramType.ctl3@SimDiagCompDiag StandardDiag Target Diag@0 DisplayName @SVarData? BSimX_Generic.ctl%@P Generic Info@ BSimX_SubVIWrapper.ctl"@PSubVI Wrapper Info @2Configuration CallbacksLNSIMX ConfigurableSubVIState.ctl$@PConfigurable SubVI InfoJSIMX TimeWaveform.xnodeSIMX TimeWaveform.ctl,@PState @ Value@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integrator@ initial time@ final time@ step size@ proposed step size@ max step size@ min step size@ discrete time step@ max step ratio>@Init Minor Substep Major SubstepFinalDiag Eval Stage@ Substep Index@ Timestep Index@ simulation time@ current timestep base@ proposed step time@ absolute tolerance@ relative tolerance@!step accepted?@!step complete? @!Halt?@!reset integrator?@ machine epsilon@ min float @!status @code@0source@Perror@ Method Order@!Finished Late [i-1]@!Discrete step?@!NaN and Inf check?@ Final Timestep Index@!(maj+disc)or(init)?@!Full Solver Reset@Execution Mode@!check vector sizes?@!solver handles zc?@ Current Idx @0Tag@@ Node Tags@ Input Width @Disc ID@ Num Cont St@ Cont St Idx@ Num Disc St@ Disc St Idx @P Node Header@@ Node Headers @ Signal@@ Node Data@@ Node Outputs@@ Z.C. Signals0@risingfallingeithernone trigger type @@Z.C. Trigger Types@P Node Record@@ Node Data @ Numeric@@inputs@@outputs@@reset@@ lower limits@@ upper limits(@upperlowerbothnone limit type@@ limit types@@ reset types @@initial conditions@@ reset I.C. @!Boolean@@limited?@@ State Names,@P Cont State data@ tick period (sec)@ time (ticks)@@fire?@ period (sec)@@ period (sec)@@ skew (sec)@ period (sec)@@ period (tick)@@ skew (tick)@P   registry@!discrete blocks?@ steps per tick@ steps to tick@!discrete tick?$@P DiscreteInfo@@ Disc States@PDisc State data@Error Block ID@PRegistry Error @Numeric@@ ZC Indices,@P Simulation Registry@!variable step solver?@!First Substep?@!Continuous States?b@P&Simulation data@TWaveform Chartf@P&Simulation data outP  @"PP#&$RSIMX TransferFunction.xnodeSIMX TransferFunction.ctl0@PState@ input u(k)@ output y(k)@@! state x(k)@@ Numerator@@ DenominatorGSIM SISO Transfer Function.ctl@P*+Transfer FunctionP999? BSimX_Generic.ctl%@P Generic State@SIMX NAryIcon.ctl&@Circle Rectangle Icon Type@Operator@@0InputOps@Polymorphic Type@! Polymorphic?@@2Term DatatypesASIMX NAryState.ctl%@P/1234NAryOp SimX InfoD`SIMX Summation.xnodeSIMX Summation.ctl(@P.5State @ Result@ Operand1@ Operand2@ amplitude@@Value@@5Waveform Chart:SIMX Halt.xnode SIMX Halt.ctl$@PState@ Kc Scaling@ Ti Scaling@ Td Scaling@P>?@PID Param Scaling@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason@PError@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time:SIMSCR Execution Mode.ctl@Execution Mode@! Nan/Inf Check~ SimParams.ctlh@P+BCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijTiming@!timing src wired?@0 Target Name@S Target DataZXDataNode.xnodenitl_TargetSpecificData.ctl6@PmnTL Target Specific Data"@@oTarget Specific Data@S G Only Data@ID @!Wired?@0Type@PrstPearl@@uSize@@uHidden@ TL_Lft_Ear TL_Rt_Ear TL_Lft_DnTL_Rf_Dn TS_Lft_Ear TS_Rt_EarTS_1stFrame_Lft_Dn TS_Lft_DnTS_LastFrame_Rt_DnTS_Rt_Dn TL_TS_Lft_Ear TL_TS_Rt_Ear TL_TS_Lft_Dn TL_TS_Rt_DnTL_TS_1stFrame_Lft_DnTL_TS_LastFrame_Rt_Dn SIM_Lft_Ear SIM_Rt_Ear DataNode_Type@@ InvisibleB SimDog.xnode SimDog.ctl.@P klpqvwxyState@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solverd@P+BCD{FGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghjTiming@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only ODE Solver SimParams.ctlv@P+BCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijDefault Constant Data @ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval @ P @b P @c P @} P@Expected End [f-1]@Actual End [f-1]@!Finished Late? [f-1]@Expected End [i-1]@Actual End [i-1]@!Finished Late? [i-1]@Expected Start [i]@Actual Start [i]@Expected Start [f]@Actual Start [f]XDNodeRunTimeDep.lvlibnitl_modes.ctl@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModeXDNodeRunTimeDep.lvlib wakeup.ctl~@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup Reason@Frame Duration@Iteration Duration@ Assigned CPUzcsXDNodeRunTimeDep.lvlibtiming_clust.ctl`@P[\]^_`adefghTiming @SType@StaticIDEbXDataNode.xnode TermInfo.ctl/@PrsTermInfo@@Size@@Hidden]XDataNode.xnode DN_Type.ctl@ TL_Lft_Ear TL_Rt_Ear TL_Lft_DnTL_Rt_Dn TS_Lft_Ear TS_Rt_EarTS_1stFrame_Lft_Dn TS_Lft_DnTS_LastFrame_Rt_DnTS_Rt_Dn TL_TS_Lft_Ear TL_TS_Rt_Ear TL_TS_Lft_Dn TL_TS_Rt_DnTL_TS_1stFrame_Lft_DnTL_TS_LastFrame_Rt_Dn DataNode_TypeH(XDataNode.xnode XDataNode.ctl2@P ylpqStateZ@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout @ P@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phase @ P@!t9 2NI_XNodeSupport.lvlib XNodeInt.ctl#@Left7 2NI_XNodeSupport.lvlib XNodeInt.ctl!@Top9 2NI_XNodeSupport.lvlib XNodeInt.ctl#@Right; 2NI_XNodeSupport.lvlib XNodeInt.ctl%@BottomH CNI_XNodeSupport.lvlibXNodeRect32.ctl0@PBoundsFYuSIMX ParameterElement.ctl$@PParameter Element@@ Instances:YuSIMX ParameterRec.ctl@P ParameterRec@@ ParametersBYuSIMX SubVIState.ctl&@P SubVI Info?YuSimX_Generic.ctl%@P Generic Info@YvSIMX Manager.xnodeSIMX Manager.ctl&@PState @$ P& P @ P$ @!Stop?@0message @!resultf@ Function callDiscrete ContinuousInitialization onlyFinal step onlySimulation execution type @ P @ period @ skewSIM subVI execution type.ctli@ Function callDiscrete ContinuousInitialization onlyFinal step onlySimulation execution typeCSIM subVI tag data.ctl#@PSIM subVI exec data"@0DNL_Simulation CallChainVNormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout @ P No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phase @ P c( d@ c cp c SimParams.ctlv@P+BCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijSimulationParameters c@P error out c` cSIM integration method.ctl@ RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Onlycontinuous integratoreSIM diagram eval stage.ctlA@Init Minor Substep Major SubstepFinalDiag Eval StageI2RZSIM Registry Node Header.ctl#@P Node Header@@ Node HeadersQSIM trigger type.ctl3@risingfallingeithernone trigger type @@Z.C. Trigger TypesC:SIM Registry Node Record.ctl@P Node Record@@ Node DataGSIM limit type.ctl+@upperlowerbothnone limit type@@ limit types@@ reset typesRSIM solver state data.ctl0@P Cont State dataFcASIM discrete data.ctl(@P DiscreteInfoBSIM Discrete state data.ctl@PDisc State dataH2Q!SIM Simulation Registry Error.ctl@PRegistry ErrorTlWSIM Simulation Registry.ctl0@P Simulation RegistrynSIM simulation data.ctlj@P&iSimulation data Out>P""d <SIM integration method.ctl} RK 1 (Euler) Linearizer State Query Trim EvalAdamsRK 3RK 4RK 45BDFRK 2RK 23 RosenbrockDiscrete States Only cDnSIM simulation data.ctlj@P&iSimulation data out c@ c@ Block Idx Out @ output cldg@ Filter_outputt_ @!Fire!a @@ interpolation valueY cPMV@@ uniform white noise@!Init or Final Stage? cy@!First Call?: T/F c@ number: 0 to 1@ Initial Time@ Final Time@ Time Step@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim EvalContinuous Solver Method@ Minimum Time Step@ Maximum Time Step@ Initial Time Step@!AutoFixedStepSize@!AutoDiscreteStepSize@ Discrete Time Step"@!CalculatePeriodUsingTimeStep@! SolverWired@ prevFrmExpEnd@ prevFrmActEnd@! prevFrmLate@prevIterExpEnd@prevIterActEnd@! prevIterLate@ ExpIterStart@ ActIterStart@ ExpFrmStart@ ActFrmStart@0srcName@0name @period@deadline @offset @start@priority @timeoutd@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup Reason@0srcType@0 secondSrcType@ globalEndTime@globalStartTime@! ResetSolverF@Single-Step ExecutionExecute Until CompletionExecution Mode\P+     HIJ !"#$%&b'd()*+,-jj@P+BCD{FGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghj timing (out) c  c"@Default Collector Stop Mode @Alarm @Ring @Ring 2 @True IdP4567 c  c@Perror IO c`>P=== d>P  d4 8: ; > > ?ABH4 K: ; > > LRS T0UWS T0X^T0U`T0UbT0> cefhT0iqT0T0UuT0T0i~T0T0T0L 88  ! % 8 & 8'8(8) , - - 6 8788898:0 !8 8;( <(! = 88 ! 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Auto/Man?@ Setpoint y_SP [kRPM]@ Time step Ts [s] @ Filter time-constant Tf [s] @@Meas_min_max [V]$@@Physical_min_max [kRPM]T@@Waveform Chart y@! Sim/Real?@TWaveform Chart u@!Reinitialize controller$P  P pTTTuu$TT$;a$aI2x!a!!!!!,,,,+,,,,,++,,,++,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,###,,,#,##,,,,,,,,#,,#,,,,,########Q@ Initial Time (s)@ Final Time (s)@ Step Size (s)o_simSolvers.ctl@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim Eval ODE Solver@ Minimum Step Size (s)@ Maximum Step Size (s)@ Relative Tolerance@ Absolute Tolerance@!Software Timing@ Initial Step Size (s) @!Automatic Fixed Step Size?"@!Automatic Discrete Step Size?@ Discrete Step Size (s)@!Calculate using Time Step@! Solver Wired?@Prev.Frm.Expected End@Prev.Frm.Actual End@!Prev.Frm.Finished Late?@Prev.Iter.Expected End@Prev.Iter.Actual End@!Prev.Iter.Finished Late?@Expected Iteration Start@Actual Iteration Start@Expected Frame Start@Actual Frame Start@0 Source Name@0Name @Period@Deadline @Offset @Start@Priority @Timeout@ No Change/Process missed periods, maintain original phase/Discard missed periods, maintain original phase-Process missed periods, ignore original phase-Discard missed periods, ignore original phaseModed@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup reason @!status @code@0source@P#$%Error@0 Source Type@0Secondary Source Type@Global End Time@Global Start Time@!Full Solver Reset:SIMSCR Execution Mode.ctl@Execution Mode@! Nan/Inf Check~ SimParams.ctlh@P+  !"&'()*+,-Timing @!Input?@!timing src wired?@0 Target Name@S Target DataZXDataNode.xnodenitl_TargetSpecificData.ctl6@P12TL Target Specific Data"@@3Target Specific Data@S G Only Data@ID @!Wired?@0Type@P678/Pearl@@9Size@@9Hidden@ TL_Lft_Ear TL_Rt_Ear TL_Lft_DnTL_Rf_Dn TS_Lft_Ear TS_Rt_EarTS_1stFrame_Lft_Dn TS_Lft_DnTS_LastFrame_Rt_DnTS_Rt_Dn TL_TS_Lft_Ear TL_TS_Rt_Ear TL_TS_Lft_Dn TL_TS_Rt_DnTL_TS_1stFrame_Lft_DnTL_TS_LastFrame_Rt_Dn SIM_Lft_Ear SIM_Rt_Ear DataNode_Type @!Boolean@@= InvisibleB SimDog.xnode SimDog.ctl.@P ./045:;<>State@ Initial Time@ Final Time@ Time Step@ Runge-Kutta 1 (Euler) Runge-Kutta 2 Runge-Kutta 3 Runge-Kutta 4Runge-Kutta 23 (variable)Runge-Kutta 45 (variable)BDF (variable)Adams-Moulton (variable)Rosenbrock (variable)Discrete States Only Linearizer State Query Trim EvalContinuous Solver Method@ Minimum Time Step@ Maximum Time Step@ Initial Time Step@!AutoFixedStepSize@!AutoDiscreteStepSize@ Discrete Time Step"@!CalculatePeriodUsingTimeStep@! SolverWired@ prevFrmExpEnd@ prevFrmActEnd@! prevFrmLate@prevIterExpEnd@prevIterActEnd@! prevIterLate@ ExpIterStart@ ActIterStart@ ExpFrmStart@ ActFrmStart@0srcName@0name @period@deadline @offset @start@priority @timeoutd@NormalAbortedAsynchronous wakeupTiming source errorTimed loop errorTimeout Wakeup Reason@0srcType@0 secondSrcType@ globalEndTime@globalStartTime@! ResetSolverF@Single-Step ExecutionExecute Until CompletionExecution Mode\P+@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]!^&_`abcd- @!stop@ Proportional gain Kc@ Integral time Ti [sec]@ Derivative time Td [sec]@Pghi PID gains@ Time step Ts [s]qi@ setpoint@ output high@ output low@Pno output range@! auto? (T)@ manual control @ output@ process variable@ setpoint high@ setpoint low@Pvwsetpoint range@ proportional gain (Kc)@ integral time (Ti, min)@ derivative time (Td, min)@Pyz{ PID gains @ dt (s)@!reinitialize? (F) @ beta@ linearity@ dt out (s)Lmpqrstuxu|u}~    Pl@ Td Scaling@ Ti Scaling@ Setpoint y_SP [kRPM]@ Setpoint low@ Setpoint high(@PSetpoint (y_SP) range [kRPM]<_Q @ Filter_output @ Ts [s] @ Filter time-constant Tf [s]@ Output low@ Output high*@PController output (u) range [V] @ Numeric@ Kc Scaling@PPID Param Scaling @ Tf [s]@!Reinitialize controller@ Filter_input@ u_man [V]@! Auto/Man? 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